1. Field of the Invention
The present invention relates to a solid-state imaging device and a production method thereof, more specifically, the present invention relates to the formation of an interelectrode insulating film of a solid-state imaging device.
2. Background Art
The solid-state imaging device utilizing CCD (Charge-Coupled Device) used for an area sensor and the like has a photoelectric conversion section comprising a photodiode or the like and a charge transfer section equipped with a charge transfer electrode for transferring a signal charge from the photoelectric conversion section. As for the charge transfer electrode, plural charge transfer electrodes are adjacently disposed on a charge transfer path formed on a semiconductor substrate and sequentially driven.
With recent development of CCD having a large number of pixels, demands for high resolution and high sensitivity of a solid-state imaging device are more and more increasing, and the number of imaging pixels has been increased to giga-pixels or more.
Under these circumstances, since reduction of the light-receiving area must be avoided to ensure high sensitivity, it is obliged to reduce the occupation area of the charge transfer electrode.
Incidentally, the interelectrode insulating film provided between charge transfer electrodes can be thinly formed by the oxidation (900 to 950° C.) of an electrode material. However, in order to form a thin and good-quality oxide film, the oxidation temperature needs to be high of 900° C. or more as described above and impurity diffusion on the substrate side proceeds due to heat history by oxidation, incurring various problems such as deterioration of transfer efficiency and reduction of sensitivity.
In this way, the formation of an interelectrode insulating film by using thermal oxidation is a big obstacle standing in the way of developing a fine (high-quality) solid-state imaging device with a large number of pixels.
As described in JP-A-2003-197896 (the term “JP-A” as used herein means an “unexamined published Japanese patent application”), a charge transfer electrode having a multilayer structure where the interelectrode insulting film is formed by a CVD (Chemical Vapor Deposition) process has been proposed with an attempt to reduce the temperature at the formation of the interelectrode insulating film.
In the case of a charge transfer electrode having a single-layer electrode structure, when the formation of an interelectrode gap and the embedding of an insulating film therein are performed by a one-time photolithography process, a fine pattern exceeding the resolution limit can be hardly formed and moreover, the embedding of an insulting film in the interelectrode gap having a high aspect ratio is extremely difficult. By taking account of such situation, there has been proposed a structure where a sidewall is formed as an interelectrode insulating film on the lateral wall of a first layer electrode formed alternately and a second layer electrode is formed through the sidewall (refer to JP-A-5-129583). In such circumstances, for the purpose of high integration, the present inventors have proposed a solid-state imaging device where a sidewall comprising a silicon oxide film formed by a low-temperature CVD process is used for one lateral wall of adjacent charge transfer electrodes (refer to Japanese Patent Application No. 2004-281721).
Such a sidewall structure is an excellent structure requiring no photolithography process and being self-alignedly formable by anisotropic etching. In many cases, the gate oxide film has been conventionally constituted by a three-layer structure comprising a 25 nm-thick silicon oxide film (bottom oxide film), a 50 nm-thick silicon nitride film, and a 10 nm-thick silicon oxide film (top oxide film). At the anisotropic etching, the silicon nitride film of the three-layer structure gate oxide film works as a stopper, and the film loss of the gate oxide film is allowed to occur only in the top oxide film. Accordingly, the anisotropic etching enables efficient formation of a charge transfer electrode with high reliability.
In this way, in the production of a solid-state imaging device, it is demanded to avoid a process at a temperature as high as incurring extension of the diffusion length of an already doped impurity, for ensuring a finer fabrication tolerance, prevent deterioration of the charge transfer efficiency, and realize high-speed driving and high-quality image output. To cope with these requirements, a CVD process, particularly, a CVD process performed at a low temperature of 700 to 850° C., has been introduced.
On the other hand, the structure using an ONO film for the gate oxide film has a problem that an electric charge is readily trapped into the silicon nitride film to cause voltage shift due to depletion particularly in the read-out section to which a high voltage is applied, and a malfunction may occur.
From this reason, the fine fabrication of a solid-state imaging device is associated with a demand for a structure not containing silicon nitride in the gate oxide film, further a structure equipped with a thin gate oxide film having high withstand voltage.